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» Heterogeneous behavioral hierarchy for system level designs
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DFT
2008
IEEE
138views VLSI» more  DFT 2008»
14 years 2 months ago
Exploring Density-Reliability Tradeoffs on Nanoscale Substrates: When do smaller less reliable devices make sense?
It is widely recognized that device and interconnect fabrics at the nanoscale will be characterized by an increased susceptibility to transient faults. This appears to be intrinsi...
Andrey V. Zykov, Gustavo de Veciana
CODES
2005
IEEE
14 years 1 months ago
Conflict analysis in multiprocess synthesis for optimized system integration
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
Oliver Bringmann, Wolfgang Rosenstiel, Axel Sieben...
SSS
2005
Springer
14 years 1 months ago
Memory Management for Self-stabilizing Operating Systems
This work presents several approaches for designing the memory management component of self stabilizing operating systems. We state the requirements which a memory manager should ...
Shlomi Dolev, Reuven Yagel
SAMOS
2004
Springer
14 years 1 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
APWEB
2006
Springer
13 years 11 months ago
Efficient Dynamic Traffic Navigation with Hierarchical Aggregation Tree
Nowadays, the rapid advances in wireless communications, positioning techniques and mobile devices enable location based service such as dynamic traffic navigation. Yet, it is a ch...
Yun Bai, Yanyan Guo, Xiaofeng Meng, Tao Wan, Karin...