723 search results - page 57 / 145 » Heterogeneous behavioral hierarchy for system level designs |
LCTRTS
2010
Springer
14 years 2 months ago
2010
Springer
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
TROB
2002
13 years 7 months ago
2002
Reconfigurable software is highly desired for automated machine tool control systems for low-cost products and short time to market. In this paper, we propose a software architectu...
ECSA
2010
Springer
13 years 6 months ago
2010
Springer
A key objective for ubiquitous environments is to enable system interoperability between system’s components that are highly heterogeneous. In particular, the challenge is to emb...
OSDI
2002
ACM
14 years 8 months ago
2002
ACM
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...