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» Heterogeneous systems on chip and systems in package
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ICCD
2008
IEEE
159views Hardware» more  ICCD 2008»
14 years 6 months ago
Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor
— Heterogeneous Chip Multiprocessors (HMPs), such as the Cell Broadband Engine, offer a new design optimization opportunity by allowing designers to provide accelerators for appl...
Michael Gschwind
ICES
2001
Springer
136views Hardware» more  ICES 2001»
14 years 2 months ago
Initial Studies of a New VLSI Field Programmable Transistor Array
A system for intrinsic hardware evolution of analog electronic circuits is presented. It consists of a VLSI chip featuring 16 × 16 programmable transistor cells, an FPGA based PCI...
Jörg Langeheine, Joachim Becker, Simon Fö...
RTCSA
2007
IEEE
14 years 4 months ago
Tardiness Bounds for EDF Scheduling on Multi-Speed Multicore Platforms
Multicore platforms, which include several processing cores on a single chip, are being widely touted as a solution to heat and energy problems that are impediments to single-core...
Hennadiy Leontyev, James H. Anderson
CCE
2007
13 years 11 months ago
A Web Services based Approach for System on a Chip Design Planning
: The concept of Virtual Organisation (VO) offers various solutions to management, collaboration and coordination issues important for distributed collaborating teams. Deployment o...
Maciej Witczynski, Edward Hrynkiewicz, Adam Pawlak
ASPDAC
2000
ACM
108views Hardware» more  ASPDAC 2000»
14 years 2 months ago
System-in-package (SIP): challenges and opportunities
Abstract - In this paper, we propose the concept of System-InPackage (SIP) as a generalization of System-On-Chip (SOC). System-In-Package overcomes formidable integration barriers ...
King L. Tai