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» Hiding Communication Latency in Data Parallel Applications
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ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
13 years 11 months ago
Tempest and Typhoon: User-Level Shared Memory
Future parallel computers must efficiently execute not only hand-coded applications but also programs written in high-level, parallel programming languages. Today's machines ...
Steven K. Reinhardt, James R. Larus, David A. Wood
NSDI
2007
13 years 10 months ago
Ricochet: Lateral Error Correction for Time-Critical Multicast
Ricochet is a low-latency reliable multicast protocol designed for time-critical clustered applications. It uses IP Multicast to transmit data and recovers from packet loss in end...
Mahesh Balakrishnan, Kenneth P. Birman, Amar Phani...
MICRO
2005
IEEE
136views Hardware» more  MICRO 2005»
14 years 1 months ago
Automatic Thread Extraction with Decoupled Software Pipelining
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
Guilherme Ottoni, Ram Rangan, Adam Stoler, David I...
SC
2005
ACM
14 years 1 months ago
The MHETA Execution Model for Heterogeneous Clusters
The availability of inexpensive “off the shelf” machines increases the likelihood that parallel programs run on heterogeneous clusters of machines. These programs are increasi...
Mario Nakazawa, David K. Lowenthal, Wenduo Zhou
HPCA
1996
IEEE
13 years 12 months ago
A Comparison of Entry Consistency and Lazy Release Consistency Implementations
This paper compares several implementations of entry consistency (EC) and lazy release consistency (LRC), two relaxed memory models in use with software distributed shared memory ...
Sarita V. Adve, Alan L. Cox, Sandhya Dwarkadas, Ra...