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ISCAS
2007
IEEE
99views Hardware» more  ISCAS 2007»
14 years 2 months ago
A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints
— Hermitian Codes offer desirable properties such as large code lengths, good error-correction at high code rates, etc. The main problem in making Hermitian codes practical is to...
Rachit Agarwal, Emanuel M. Popovici, Brendan O'Fly...
SC
1995
ACM
13 years 11 months ago
A Performance Evaluation of the Convex SPP-1000 Scalable Shared Memory Parallel Computer
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
Thomas L. Sterling, Daniel Savarese, Peter MacNeic...
CCECE
2006
IEEE
14 years 2 months ago
A Formal CSP Framework for Message-Passing HPC Programming
To help programmers of high-performance computing (HPC) systems avoid communication-related errors, we employ a formal process algebra, Communicating Sequential Processes (CSP), w...
John D. Carter, William B. Gardner
PPSN
1994
Springer
14 years 4 days ago
RPL2: A Language and Parallel Framework for Evolutionary Computing
The Reproductive Plan Language 2 (RPL2) is an extensible interpreted language for writing and using evolutionary computing programs. It supports arbitrary genetic representations,...
Patrick D. Surry, Nicholas J. Radcliffe
IPPS
1996
IEEE
14 years 6 days ago
ECO: Efficient Collective Operations for Communication on Heterogeneous Networks
PVM and other distributed computing systems have enabled the use of networks of workstations for parallel computation, but their approach of treating all networks as collections o...
Bruce Lowekamp, Adam Beguelin