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ERSA
2006
119views Hardware» more  ERSA 2006»
13 years 9 months ago
Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment
Run-time assignment of a set of communicating tasks onto a heterogeneous multiprocessor system-on-chip (MPSoC) platform is a challenging task. Having FPGA fabric tiles in such MPS...
Vincent Nollet, Prabhat Avasare, Diederik Verkest,...
P2P
2006
IEEE
14 years 2 months ago
Cost-Based Analysis of Hierarchical DHT Design
Flat DHT architectures have been the main focus of the research on DHT design so far. However, there have been also a number of works proposing hierarchical DHT organizations and ...
Stefan Zöls, Zoran Despotovic, Wolfgang Kelle...
AAAI
1998
13 years 9 months ago
Hybrid Planning for Partially Hierarchical Domains
Hierarchical task network and action-based planning approaches have traditionally been studied separately. In many domains, human expertise in the form of hierarchical reduction s...
Subbarao Kambhampati, Amol Dattatraya Mali, Biplav...
SGAI
2010
Springer
13 years 6 months ago
Hierarchical Traces for Reduced NSM Memory Requirements
This paper presents work on using hierarchical long term memory to reduce the memory requirements of nearest sequence memory (NSM) learning, a previously published, instance-based ...
Torbjørn S. Dahl
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
14 years 3 months ago
User-centric design space exploration for heterogeneous Network-on-Chip platforms
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...
Chen-Ling Chou, Radu Marculescu