38 search results - page 4 / 8 » Hierarchical Instruction Register Organization |
CCGRID
2009
IEEE
14 years 2 months ago
2009
IEEE
Highly distributed systems such as Grids are used today to the execution of large-scale parallel applications. The behavior analysis of these applications is not trivial. The comp...
ICCD
2003
IEEE
14 years 4 months ago
2003
IEEE
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
SAMOS
2010
Springer
13 years 6 months ago
2010
Springer
—Previous vector architectures divided the available register file space in a fixed number of registers of equal sizes and shapes. We propose a register file organization whic...
ISCA
2003
IEEE
14 years 28 days ago
2003
IEEE
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...