238 search results - page 18 / 48 » Hierarchical Interconnect Circuit Models |
SLIP
2003
ACM
14 years 26 days ago
2003
ACM
In the past, a priori interconnect prediction, based on Rent’s rule, has been applied mainly for technology evaluation and roadmap applications. These applications do not requir...
TCAD
2002
13 years 7 months ago
2002
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
Capturing RLCK circuit responses accurately with existing model order reduction (MOR) techniques is very expensive. Direct metrics for fast analysis of RC circuits exist but there...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
FPGA
2003
ACM
14 years 25 days ago
2003
ACM
How does multilevel metalization impact the design of FPGA interconnect? The availability of a growing number of metal layers presents the opportunity to use wiring in the thirddi...