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TVLSI
2010
13 years 2 months ago
Fast Analysis of a Large-Scale Inductive Interconnect by Block-Structure-Preserved Macromodeling
To efficiently analyze the large-scale interconnect dominant circuits with inductive couplings (mutual inductances), this paper introduces a new state matrix, called VNA, to stamp ...
Hao Yu, Chunta Chu, Yiyu Shi, David Smart, Lei He,...
ISQED
2011
IEEE
240views Hardware» more  ISQED 2011»
12 years 10 months ago
Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling
—Design optimization methodologies for AMS-SoCs with analog, digital, and mixed-signal portions have not received significant attention, due to their high complexity. In mixed-s...
Oleg Garitselov, Saraju P. Mohanty, Elias Kougiano...
ANSS
2008
IEEE
14 years 2 months ago
Resource Allocation Strategies in a 2-Level Hierarchical Grid System
Efficient job scheduling in grids is challenging due to the large number of distributed autonomous resources. In this paper we study various resource allocation policies in a 2-le...
Stylianos Zikos, Helen D. Karatza
SDM
2009
SIAM
394views Data Mining» more  SDM 2009»
14 years 4 months ago
Multi-Modal Hierarchical Dirichlet Process Model for Predicting Image Annotation and Image-Object Label Correspondence.
Many real-world applications call for learning predictive relationships from multi-modal data. In particular, in multi-media and web applications, given a dataset of images and th...
Oksana Yakhnenko, Vasant Honavar
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
13 years 12 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann