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» Hierarchical Simulation of a Multiprocessor Architecture
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DAC
2005
ACM
13 years 9 months ago
Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation
On-chip supply networks are playing an increasingly important role for modern nanometer-scale designs. However, the ever growing sizes of power grids make the analysis problem ext...
Peng Li
DSD
2003
IEEE
121views Hardware» more  DSD 2003»
14 years 25 days ago
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors
With shrinking feature size of silicon fabrication technology, architects are putting more and more logic into a single die. While one might opt to use these transistors for build...
Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemi...
CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
ICCD
2008
IEEE
119views Hardware» more  ICCD 2008»
14 years 4 months ago
Hierarchical simulation-based verification of Anton, a special-purpose parallel machine
—One of the major design verification challenges in the development of Anton, a massively parallel special-purpose machine for molecular dynamics, was to provide evidence that co...
John P. Grossman, John K. Salmon, Richard C. Ho, D...
ICRA
2003
IEEE
135views Robotics» more  ICRA 2003»
14 years 25 days ago
Robodaemon -a device independent, network-oriented, modular mobile robot controller
Abstract— We discuss a software environment for multirobot, multi-platform mobile robot control and simulation. Like others, we have observed that mobile robotics research is gre...
Gregory Dudek, Robert Sim