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» Hierarchical Simulation of a Multiprocessor Architecture
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HPCA
2005
IEEE
14 years 7 months ago
Improving Multiple-CMP Systems Using Token Coherence
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
Michael R. Marty, Jesse D. Bingham, Mark D. Hill, ...
IPPS
2000
IEEE
13 years 12 months ago
Performance of On-Chip Multiprocessors for Vision Tasks
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
Yongwha Chung, K. Park, W. Hahn, Neungsoo Park, Vi...
WSC
2004
13 years 8 months ago
Hierarchical Production Planning Using a Hybrid System Dynamic - Discrete Event Simulation Architecture
Hierarchical production planning provides a formal bridge between long-term plans and short-term schedules. A hybrid simulation-based production planning architecture consisting o...
Jayendran Venkateswaran, Young-Jun Son, Albert Jon...
VLSI
2007
Springer
14 years 1 months ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
EUROPAR
2005
Springer
14 years 1 months ago
Hierarchical Scheduling for Moldable Tasks
The model of moldable task (MT) was introduced some years ago and has been proved to be an efficient way for implementing parallel applications. It considers a target application ...
Pierre-François Dutot