Improving Multiple-CMP Systems Using Token Coherence

Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems will have caches that must be kept coherent. Coherence is a particular challenge for MultipleCMP (M-CMP) systems. One approach is to use a hierarchical protocol that explicitly separates the intraCMP coherence protocol from the inter-CMP protocol, but couples them hierarchically to maintain coherence. However, hierarchical protocols are complex, leading to subtle, difficult-to-verify race conditions. Furthermore, most previous hierarchical protocols use directories at one or both levels, incurring indirections--and thus extra latency--for sharing misses, which are common in commercial workloads. In contrast, this paper exploits the separation of correctness substrate and performance policy in the recently-proposed token coherence protocol to develop the first M-CMP coherence protocol that is flat for correctn...

• Type: Conference
• Year: 2005
• Where: HPCA
• Authors: Michael R. Marty, Jesse D. Bingham, Mark D. Hill, Alan J. Hu, Milo M. K. Martin, David A. Wood
• Keywords: Computer Architecture, HPCA 2005, IntraCMP Coherence Protocol, M-CMP Coherence Protocol, Token Coherence Protocol