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» Hierarchical Simulation of a Multiprocessor Architecture
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HPCA
2006
IEEE
14 years 7 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
ACSC
2002
IEEE
14 years 14 days ago
Employing Hierarchical Federation Communities in the Virtual Ship Architecture
This paper discusses work underway to develop a framework for the use of hierarchical federation communities as a tool for distributed simulation. The Virtual Ship Project is the ...
A. Cramp, Michael J. Oudshoorn
IPPS
1998
IEEE
13 years 11 months ago
Multiprocessor Architectures Using Multi-Hop Multi-OPS Lightwave Networks and Distributed Control
Advances in optical technology have increased the interest for multiprocessor architectures based on lightwave networks because of the vast bandwidth available. In this paper we p...
David Coudert, Afonso Ferreira, Xavier Muño...
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
14 years 1 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
SIPS
2007
IEEE
14 years 1 months ago
Sphere Decoding for Multiprocessor Architectures
Motivated by the need for high throughput sphere decoding for multipleinput-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD)...
Qi Qi, Chaitali Chakrabarti