57 search results - page 6 / 12 » Hierarchical Traces for Reduced NSM Memory Requirements |
DAC
2004
ACM
14 years 8 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
SDM
2007
SIAM
13 years 9 months ago
2007
SIAM
Given a large sparse graph, how can we find patterns and anomalies? Several important applications can be modeled as large sparse graphs, e.g., network traffic monitoring, resea...
VLSISP
2008
13 years 7 months ago
2008
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
IPPS
1997
IEEE
13 years 11 months ago
1997
IEEE
Software distributed shared memory (DSM) techniques, while effective on applications with coarse-grained sharing, yield poor performance for the fine-grained sharing encountered i...
ISCA
2000
IEEE
13 years 12 months ago
2000
IEEE
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...