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FORMATS
2007
Springer
14 years 1 months ago
Partial Order Reduction for Verification of Real-Time Components
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
John Håkansson, Paul Pettersson
APNOMS
2006
Springer
14 years 1 months ago
GMPLS-Based VPN Service to Realize End-to-End QoS and Resilient Paths
We propose hierarchically distributed path computation elements (HDPCEs) that manage a multilayered GMPLS network and provide traffic engineering paths for end-to-end routes. We ap...
Hiroshi Matsuura, Kazumasa Takami
VISSYM
2007
14 years 4 days ago
Multiresolution MIP Rendering of Large Volumetric Data Accelerated on Graphics Hardware
This paper is concerned with a multiresolution representation for maximum intensity projection (MIP) volume rendering based on morphological pyramids which allows progressive refi...
Wladimir J. van der Laan, Andrei Jalba, Jos B. T. ...
WSC
2008
14 years 1 days ago
PLCStudio: Simulation based PLC code verification
Proposed in this paper is the architecture of a PLC programming environment that enables a visual verification of PLC programs. The proposed architecture integrates a PLC program ...
Sang C. Park, Chang Mok Park, Gi-Nam Wang, Jonggeu...
FPL
2008
Springer
119views Hardware» more  FPL 2008»
13 years 11 months ago
An FPGA-based high-speed, low-latency trigger processor for high-energy physics
An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high b...
Jan de Cuveland, Felix Rettig, Venelin Angelov, Vo...