Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
In this paper we introduce quantum interactive proof systems, which are interactive proof systems in which the prover and verifier may perform quantum computations and exchange qu...
We present a new multiple ring network for multiprocessors, called the Multistage Ring Network(MRN). The MRN has a 2-level hierarchy of register insertion rings, and its interconn...
This research proposes a computational framework for generating visual attending behavior in an embodied simulated human agent. Such behaviors directly control eye and head motion...
In this paper we present a novel approach for cluster-based drawing of large planar graphs that maintains planarity. Our technique works for arbitrary planar graphs and produces a ...
Christian A. Duncan, Michael T. Goodrich, Stephen ...