Sciweavers

88 search results - page 13 / 18
» High Level Synthesis from Sim-nML Processor Models
Sort
View
INTERSPEECH
2010
13 years 2 months ago
Text-based unstressed syllable prediction in Mandarin
Recently, an increasing attention has been paid to Mandarin word stress which is important for improving the naturalness of speech synthesis. Most of the research on Mandarin spee...
Ya Li, Jianhua Tao, Meng Zhang, Shifeng Pan, Xiaoy...
VLSI
2005
Springer
14 years 1 months ago
Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits
Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but...
Bertrand Folco, Vivian Brégier, Laurent Fes...
EDCC
2006
Springer
13 years 11 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...
RE
1997
Springer
13 years 12 months ago
Requirements Models in Context
The field of requirements engineering emerges out of tradition of research and engineering practice that stresses rtance of generalizations and abstractions. abstraction is essent...
Colin Potts
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
13 years 11 months ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta