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» High Performance FPGA Implementation of the Mersenne Twister
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FCCM
2000
IEEE
131views VLSI» more  FCCM 2000»
13 years 12 months ago
A Reliable LZ Data Compressor on Reconfigurable Coprocessors
Data compression techniques based on Lempel-Ziv (LZ) algorithm are widely used in a variety of applications, especially in data storage and communications. However, since the LZ a...
Wei-Je Huang, Nirmal R. Saxena, Edward J. McCluske...
29
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EUC
2007
Springer
13 years 11 months ago
Parallel Network Intrusion Detection on Reconfigurable Platforms
With the wide adoption of internet into our everyday lives, internet security becomes an important issue. Intrusion detection at the network level is an effective way of stopping m...
Chun Xue, Zili Shao, Meilin Liu, Qingfeng Zhuge, E...
ICRA
2010
IEEE
245views Robotics» more  ICRA 2010»
13 years 6 months ago
2000 fps real-time vision system with high-frame-rate video recording
—This paper introduces a high-speed vision system called IDP Express, which can execute real-time image processing and high frame rate video recording simultaneously. In IDP Expr...
Idaku Ishii, Tetsuro Tatebe, Qingyi Gu, Yuta Moriu...
FCCM
2008
IEEE
205views VLSI» more  FCCM 2008»
14 years 1 months ago
Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation
The recent turmoil in global credit markets has demonstrated the need for advanced modelling of credit risk, which can take into account the effects of changing economic condition...
David B. Thomas, Wayne Luk
GLVLSI
2007
IEEE
166views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Efficient pipelining for modular multiplication architectures in prime fields
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid...