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» High Performance Matrix Multiplication on Many Cores
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DSD
2009
IEEE
148views Hardware» more  DSD 2009»
14 years 3 months ago
SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
Asadollah Shahbahrami, Ben H. H. Juurlink
ENTCS
2007
114views more  ENTCS 2007»
13 years 9 months ago
Parametric Performance Contracts for Software Components with Concurrent Behaviour
Performance prediction methods for component-based software systems aim at supporting design decisions of software architects during early development stages. With the increased a...
Jens Happe, Heiko Koziolek, Ralf Reussner
SIES
2008
IEEE
14 years 3 months ago
Performance evaluation of a java chip-multiprocessor
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
Christof Pitter, Martin Schoeberl
ASPLOS
2004
ACM
14 years 2 months ago
Continual flow pipelines
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkar...
CORR
2011
Springer
188views Education» more  CORR 2011»
13 years 4 months ago
Robust Matrix Completion with Corrupted Columns
This paper considers the problem of matrix completion, when some number of the columns are arbitrarily corrupted, potentially by a malicious adversary. It is well-known that stand...
Yudong Chen, Huan Xu, Constantine Caramanis, Sujay...