154 search results - page 4 / 31 » High level cache simulation for heterogeneous multiprocessor... |
ISCA
2007
IEEE
13 years 9 months ago
2007
IEEE
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural techniques to move processor performance to higher levels, ...
ISCA
2010
IEEE
14 years 2 months ago
2010
IEEE
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
CF
2006
ACM
14 years 3 months ago
2006
ACM
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
MAM
2002
13 years 9 months ago
2002
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
HPCA
2009
IEEE
14 years 10 months ago
2009
IEEE
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...