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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 7 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
ICAC
2006
IEEE
14 years 1 months ago
The Laundromat Model for Autonomic Cluster Computing
Traditional High Performance Computing systems require extensive management and suffer from security and configuration problems. This paper presents a new clustermanagement syste...
Jacob Gorm Hansen, Eske Christiansen, Eric Jul
ISPASS
2007
IEEE
14 years 1 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
ICC
2007
IEEE
214views Communications» more  ICC 2007»
14 years 1 months ago
Distributed ONS and its Impact on Privacy
— The EPC Network is an industry proposal to build a global information architecture for objects carrying RFID tags with Electronic Product Codes (EPC). A so-called Object Naming...
Benjamin Fabian, Oliver Günther
ICCCN
1997
IEEE
13 years 11 months ago
Design and implementation of a QoS capable switch-router
Rapid expansion has strained the capabilities of the Internet infrastructure. Emerging audio and video applications place further demands on already overloaded network elements, e...
Erol Basturk, Alexander Birman, G. Delp, Roch Gu&e...