Sciweavers

733 search results - page 128 / 147
» High performance in tree-based parallel architectures
Sort
View
HPCA
2003
IEEE
14 years 9 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
ICS
2009
Tsinghua U.
14 years 3 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
OOPSLA
2009
Springer
14 years 3 months ago
Grace: safe multithreaded programming for C/C++
The shift from single to multiple core architectures means that programmers must write concurrent, multithreaded programs in order to increase application performance. Unfortunate...
Emery D. Berger, Ting Yang, Tongping Liu, Gene Nov...
MSWIM
2006
ACM
14 years 2 months ago
The effect of the radio wave propagation model in mobile ad hoc networks
The simulation of wireless networks has been an important tool for researchers and the industry in the last years. Especially in the field of Mobile Ad Hoc Networking, most curre...
Arne Schmitz, Martin Wenig
GCC
2005
Springer
14 years 2 months ago
Experiences in Running Workloads over Grid3
Running workloads in a grid environment is often a challenging problem due the scale of the environment, and to the resource partitioning based on various sharing strategies. A res...
Catalin Dumitrescu, Ioan Raicu, Ian T. Foster