733 search results - page 140 / 147 » High performance in tree-based parallel architectures |
HPCA
2008
IEEE
14 years 9 months ago
2008
IEEE
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
HPCA
2005
IEEE
14 years 9 months ago
2005
IEEE
Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional ...
JSSPP
2007
Springer
14 years 2 months ago
2007
Springer
The number of distributed high performance computing architectures has increased exponentially these last years. Thus, systems composed by several computational resources provided ...
ISCA
1995
IEEE
14 years 7 days ago
1995
IEEE
One can e ectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential bene ts of predicated execution are hig...
ICS
2009
Tsinghua U.
14 years 1 months ago
2009
Tsinghua U.
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...