733 search results - page 4 / 147 » High performance in tree-based parallel architectures |
HPCA
1995
IEEE
13 years 11 months ago
1995
IEEE
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
Parallel I/O plays a crucial role for most data-intensive applications running on massively parallel systems like Blue Gene/L that provides the promise of delivering enormous comp...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
Switch-based interconnects are used in a number of application domains including parallel system interconnects, local area networks, and wide area networks. However, very few swit...
SBACPAD
2008
IEEE
14 years 1 months ago
2008
IEEE
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...