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IISWC
2006
IEEE
14 years 3 months ago
Characterization of Error-Tolerant Applications when Protecting Control Data
Soft errors have become a significant concern and recent studies have measured the “architectural vulnerability factor” of systems to such errors, or conversely, the potentia...
Darshan D. Thaker, Diana Franklin, John Oliver, Su...
CF
2006
ACM
14 years 3 months ago
Dynamic thread assignment on heterogeneous multiprocessor architectures
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
Michela Becchi, Patrick Crowley
VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 3 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
CODES
2005
IEEE
14 years 3 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
KBSE
2005
IEEE
14 years 3 months ago
Automated test generation for engineering applications
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
Songtao Xia, Ben Di Vito, César Muño...