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CCGRID
2007
IEEE
14 years 2 months ago
High-Performance MPI Broadcast Algorithm for Grid Environments Utilizing Multi-lane NICs
The performance of MPI collective operations, such as broadcast and reduction, is heavily affected by network topologies, especially in grid environments. Many techniques to cons...
Tatsuhiro Chiba, Toshio Endo, Satoshi Matsuoka
IPPS
1998
IEEE
13 years 12 months ago
HIPIQS: A High-Performance Switch Architecture Using Input Queuing
Switch-based interconnects are used in a number of application domains including parallel system interconnects, local area networks, and wide area networks. However, very few swit...
Rajeev Sivaram, Craig B. Stunkel, Dhabaleswar K. P...
AINA
2009
IEEE
14 years 2 months ago
A Pipelined IP Forwarding Engine with Fast Update
IP address lookup is one of the most important functionalities in the router design. To meet the requirements in high speed routers consisting of linecards with 40Gbps transfer ra...
Yeim-Kuan Chang, Yen-Cheng Liu, Fang-Chen Kuo
ISCA
1995
IEEE
118views Hardware» more  ISCA 1995»
13 years 11 months ago
The EM-X Parallel Computer: Architecture and Basic Performance
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Ha...
DSN
2009
IEEE
14 years 2 months ago
Low overhead Soft Error Mitigation techniques for high-performance and aggressive systems
The threat of soft error induced system failure in high performance computing systems has become more prominent, as we adopt ultra-deep submicron process technologies. In this pap...
Naga Durga Prasad Avirneni, Viswanathan Subramania...