290 search results - page 21 / 58 » High-Speed MARS Hardware |
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
HOTI
2005
IEEE
14 years 1 months ago
2005
IEEE
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
With the onset of Gigabit networks, current generation networking components will soon be insufficient for numerous reasons: most notably because existing methods cannot support h...
ARITH
1999
IEEE
13 years 12 months ago
1999
IEEE
Inverse square roots are used in several digital signal processing, multimedia, and scientific computing applications. This paper presents a high-speed method for computing invers...