290 search results - page 30 / 58 » High-Speed MARS Hardware |
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— A new adaptation strategy for the equalization of high speed binary links is presented which reduces patterndependent jitter. Instead of using the LMS or a related algorithm th...
ESORICS
2000
Springer
13 years 11 months ago
2000
Springer
The ATM technology has been specified to provide users with the ability to request quality of service (QoS) for their applicatio ns and to enable high speed communications. Howeve...
ENGL
2008
13 years 7 months ago
2008
This paper discusses novel dedicated hardware architecture for hybrid optimization based on Genetic algorithm (GA) and Simulated Annealing (SA). The proposed architecture achieves ...
ECBS
2008
IEEE
13 years 7 months ago
2008
IEEE
A discrete control system, with stringent hardware constraints, is effectively an embedded real-time system and hence requires a rigorous methodology to develop the software invol...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
This paper presents new methods for restructuring logic networks based on fast Boolean techniques. The basis for these are 1) a cut based view of a logic network, 2) exploiting th...