4 search results - page 1 / 1 » High-level ATPG for Early Power Analysis |
MTV
2005
IEEE
14 years 2 months ago
2005
IEEE
Our mutation based validation paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently identify and analyze the architec...
ITC
1999
IEEE
14 years 24 days ago
1999
IEEE
SAMOS
2004
Springer
14 years 1 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
VLSID
2009
IEEE
14 years 9 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...