Sciweavers

140 search results - page 11 / 28
» High-level design for asynchronous logic
Sort
View
ASYNC
2003
IEEE
97views Hardware» more  ASYNC 2003»
14 years 27 days ago
Energy and Performance Models for Clocked and Asynchronous Communication
Parameterized first-order models for throughput, energy, and bandwidth are presented in this paper. Models are developed for many common pipeline methodologies, including clocked...
Kenneth S. Stevens
WOA
2003
13 years 9 months ago
A Design Tool to Develop Agent-Based Workflow Management Systems
— This paper describes a methodology to design a workflow management system where a set of intelligent software agents composes an interactive scenario. The Workflow Management C...
Marco Repetto, Massimo Paolucci 0002, Antonio Bocc...
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
14 years 1 months ago
Low energy asynchronous architectures
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
Ilya Obridko, Ran Ginosar
ICCD
1992
IEEE
84views Hardware» more  ICCD 1992»
13 years 11 months ago
Synthesis of 3D Asynchronous State Machines
We describe a new synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple input change fundamental m...
Kenneth Y. Yun, David L. Dill, Steven M. Nowick
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
14 years 17 days ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...