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» High-level design for asynchronous logic
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DSD
2006
IEEE
113views Hardware» more  DSD 2006»
14 years 1 months ago
An Asynchronous PLA with Improved Security Characteristics
Programmable logic arrays (PLAs) present an alternative to logic-gate based design. We propose the transistor level structure of a PLA for single-rail asynchronous applications. T...
Petros Oikonomakos, Simon W. Moore
ASYNC
2003
IEEE
119views Hardware» more  ASYNC 2003»
14 years 27 days ago
Asynchronous DRAM Design and Synthesis
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
Virantha N. Ekanayake, Rajit Manohar
INFOCOM
2009
IEEE
14 years 2 months ago
iPASS: Incentivized Peer-Assisted System for Asynchronous Streaming
Abstract— As an efficient distribution mechanism, peer-topeer technology has become a tremendously attractive solution to offload servers in large scale video streaming applica...
Chao Liang, Zhenghua Fu, Yong Liu, Chai Wah Wu
POPL
2010
ACM
13 years 10 months ago
Reconfigurable asynchronous logic automata: (RALA)
Computer science has served to insulate programs and programmers from knowledge of the underlying mechanisms used to manipulate information, however this fiction is increasingly h...
Neil Gershenfeld, David Dalrymple, Kailiang Chen, ...
DLOG
2009
13 years 8 months ago
Using Description Logics in Relation Based Access Control
Relation Based Access Control (RelBAC) is an access control model designed for the new scenarios of access control on Web 2.0. Under this model, we discuss in this paper how to for...
Rui Zhang, Alessandro Artale, Fausto Giunchiglia, ...