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119
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ISVLSI
2002
IEEE
81views VLSI» more  ISVLSI 2002»
15 years 8 months ago
Impact of Technology Scaling in the Clock System Power
The clock distribution and generation circuitry is known to consume more than a quarter of the power budget of existing microprocessors. A previously derived clock energy model is...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
125
Voted
INFOCOM
1999
IEEE
15 years 8 months ago
A Kalman-Filter Method for Power Control in Broadband Wireless Networks
: A Kalman-filter method for power control is proposed for broadband, packet-switched TDMA wireless networks. By observing the temporal correlation of cochannel interference when t...
Kin K. Leung
119
Voted
FPL
2010
Springer
131views Hardware» more  FPL 2010»
15 years 1 months ago
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
Antonin Hermanek, Michal Kunes, Milan Tichý
107
Voted
ISLPED
1999
ACM
143views Hardware» more  ISLPED 1999»
15 years 8 months ago
Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
Kanad Ghose, Milind B. Kamble
139
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DAGSTUHL
2006
15 years 5 months ago
Reliability-Aware Power Management Of Multi-Core Systems (MPSoCs)
Long-term reliability of processors in embedded systems is experiencing growing attention since decreasing feature sizes and increasing power consumption have a negative influence...
Klaus Waldschmidt, Jan Haase, Andreas Hofmann, Mar...