In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
We propose a methodology and power models for an accurate high-level power estimation of physically partitioned and power-gated SRAM arrays. The models offer accurate estimation o...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
This paper presents a power evaluation framework designed for estimating power consumption of a new video telephone compression standard, ITU-H.263, at the system level. A hierarc...
This paper describes PowerBooter, an automated power model construction technique that uses built-in battery voltage sensors and knowledge of battery discharge behavior to monitor...
Excessive power dissipation in integrated circuits causes overheating and can lead to soft errors and or permanent damage. The severity of the problem increases in proportion to t...
Richard Burch, Farid N. Najm, Ping Yang, Timothy N...