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ECCTD
2011
72views more  ECCTD 2011»
12 years 7 months ago
Managing variability for ultimate energy efficiency
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
Borivoje Nikolic
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
14 years 1 months ago
Pre-synthesis optimization of multiplications to improve circuit performance
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
Rafael Ruiz-Sautua, María C. Molina, Jos&ea...
HIPS
1998
IEEE
13 years 12 months ago
A Graph-Based Framework for the Definition of Tools Dealing with Sparse and Irregular Distributed Data Structures
Industrial applications use specific problem-oriented implementations of large sparse and irregular data structures. Hence there is a need for tools that make it possible for deve...
Jean-Michel Lépine, Serge Chaumette, Frank ...
CISIM
2008
IEEE
14 years 2 months ago
Tuning Struggle Strategy in Genetic Algorithms for Scheduling in Computational Grids
Job Scheduling on Computational Grids is gaining importance due to the need for efficient large-scale Grid-enabled applications. Among different optimization techniques addressed ...
Fatos Xhafa, Bernat Duran, Ajith Abraham, Keshav P...
DAC
1994
ACM
13 years 11 months ago
Error Diagnosis for Transistor-Level Verification
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
Andreas Kuehlmann, David Ihsin Cheng, Arvind Srini...