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FPL
2008
Springer
207views Hardware» more  FPL 2008»
13 years 9 months ago
Bitstream compression techniques for Virtex 4 FPGAs
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Radu Stefan, Sorin Dan Cotofana
DATE
2009
IEEE
139views Hardware» more  DATE 2009»
14 years 2 months ago
Cross-architectural design space exploration tool for reconfigurable processors
—Processors that deploy fine-grained reconfigurable fabrics to implement application-specific accelerators ondemand obtained significant attention within the last decade. They tr...
Lars Bauer, Muhammad Shafique, Jörg Henkel
HPCC
2007
Springer
14 years 1 months ago
On Pancyclicity Properties of OTIS Networks
The OTIS-Network (also referred to as two-level swapped network) is composed of n clones of an n-node original network constituting its clusters. It has received much attention due...
Mohammad R. Hoseinyfarahabady, Hamid Sarbazi-Azad
DATE
2009
IEEE
155views Hardware» more  DATE 2009»
13 years 11 months ago
Automatically mapping applications to a self-reconfiguring platform
The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their g...
Karel Bruneel, Fatma Abouelella, Dirk Stroobandt
VLSISP
2008
173views more  VLSISP 2008»
13 years 7 months ago
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
Yedidya Hilewitz, Ruby B. Lee