Sciweavers

111 search results - page 5 / 23
» High-level specification and efficient implementation of pip...
Sort
View
ACSD
1998
IEEE
90views Hardware» more  ACSD 1998»
14 years 2 months ago
Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation
This paper makes the idea of memory shadowing [5] applicable to symbolic ternary simulation. Memory shadowing, an extension of Burch and Dill's pipeline verification method [...
Miroslav N. Velev, Randal E. Bryant
DSD
2005
IEEE
123views Hardware» more  DSD 2005»
14 years 4 months ago
Hardware-Based Implementation of the Common Approximate Substring Algorithm
An implementation of an algorithm for string matching, commonly used in DNA string analysis, using configurable technology is proposed. The design of the circuit allows for pipeli...
Kenneth B. Kent, Sharon Van Schaick, Jacqueline E....
CHES
2003
Springer
146views Cryptology» more  CHES 2003»
14 years 2 months ago
Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs
Abstract. Performance evaluation of the Advanced Encryption Standard candidates has led to intensive study of both hardware and software implementations. However, although plentifu...
François-Xavier Standaert, Gaël Rouvro...
RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
14 years 4 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas
FORTE
1998
13 years 11 months ago
Hardware synthesis from protocol specifications in LOTOS
: In this paper, we propose a technique for hardware implementation of protocol specifications in LOTOS. For the purpose, we define a new model called synchronous EFSMs consisting ...
Keiichi Yasumoto, Akira Kitajima, Teruo Higashino,...