Sciweavers

208 search results - page 27 / 42
» Highly dependable concurrent programming using design for ve...
Sort
View
HPCA
2002
IEEE
14 years 1 months ago
Fine-Grain Priority Scheduling on Multi-Channel Memory Systems
Configurations of contemporary DRAM memory systems become increasingly complex. A recent study [5] shows that application performance is highly sensitive to choices of configura...
Zhichun Zhu, Zhao Zhang, Xiaodong Zhang
PLDI
2006
ACM
14 years 2 months ago
Refactoring programs to secure information flows
Adding a sound information flow security policy to an existing program is a difficult task that requires major analysis of and changes to the program. In this paper we show how ...
Scott F. Smith, Mark Thober
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
14 years 28 days ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
LCTRTS
2005
Springer
14 years 2 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
DAC
2004
ACM
14 years 9 months ago
Refining the SAT decision ordering for bounded model checking
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...
Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio So...