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119
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HPCA
1997
IEEE
15 years 8 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
130
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ISCA
1994
IEEE
15 years 8 months ago
1994
IEEE
Wepresentaunijiedapp?'each to assess thet7adeoff of architecture techniques that affect mean memory access time. The architectural features we consider inciude cache hit Tati...
118
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SIGMETRICS
1990
ACM
15 years 8 months ago
1990
ACM
Recently we presented several disk array architectures designed to increase the data rate and I/O rate of supercomputing applications, transaction processing, and file systems [Pat...
123
Voted
COMPSAC
2004
IEEE
15 years 8 months ago
2004
IEEE
Many developers who could benefit from building and analysing formal models of their systems are deterred from doing so by the process algebra style input languages of formal mode...
134
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APL
1995
ACM
15 years 8 months ago
1995
ACM
Iverson has greatly enlarged the mathematical notion of function composition and made it available to computer programmers. This paper explains the concept, and uses practical exa...