143 search results - page 19 / 29 » Hybrid networks of evolutionary processors are computational... |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
SBACPAD
2006
IEEE
2006
IEEE
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
14 years 1 months ago
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...
NAR
2008
13 years 7 months ago
2008
Protein sequences are the most important source of evolutionary and functional information for new proteins. In order to facilitate the computationally intensive tasks of sequence...
FPGA
2010
ACM
13 years 7 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
ICPP
2002
IEEE
14 years 14 days ago
2002
IEEE
In this paper, we formulate the array robustness theorems (ARTs) for efficient computation and communication on faulty arrays. No hardware redundancy is required and no assumptio...