713 search results - page 3 / 143 » Hybrid transactional memory |
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
ICECCS
2010
IEEE
13 years 7 months ago
2010
IEEE
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...
PVLDB
2010
13 years 5 months ago
2010
In this paper, we describe a main memory hybrid database system called HYRISE, which automatically partitions tables into vertical partitions of varying widths depending on how th...
ISCA
1993
IEEE
13 years 11 months ago
1993
IEEE
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
Exploiting thread level parallelism is paramount in the multi-core era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded progra...