713 search results - page 65 / 143 » Hybrid transactional memory |
DATE
2003
IEEE
14 years 28 days ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
ICPP
1999
IEEE
13 years 12 months ago
1999
IEEE
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
POPL
2009
ACM
14 years 8 months ago
2009
ACM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
ISCA
1993
IEEE
13 years 11 months ago
1993
IEEE
We evaluate the e ect of processor speed, network bandwidth, and software overhead on the performance of release-consistent software distributed shared memory. We examine ve di er...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
—As turbo decoding is a highly memory-intensive algorithm consuming large power, a major issue to be solved in practical implementation is to reduce power consumption. This paper...