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EMSOFT
2006
Springer
14 years 11 days ago
A superblock-based flash translation layer for NAND flash memory
In NAND flash-based storage systems, an intermediate software layer called a flash translation layer (FTL) is usually employed to hide the erase-before-write characteristics of NA...
Jeong-Uk Kang, Heeseung Jo, Jinsoo Kim, Joonwon Le...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 8 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
SIGMOD
2009
ACM
137views Database» more  SIGMOD 2009»
14 years 9 months ago
Advances in flash memory SSD technology for enterprise database applications
The past few decades have witnessed a chronic and widening imbalance among processor bandwidth, disk capacity, and access speed of disk. According to Amdhal's law, the perfor...
Sang-Won Lee, Bongki Moon, Chanik Park
ICIP
1998
IEEE
14 years 10 months ago
Fast Search for Long-Term Memory Motion-Compensated Prediction
Long-term memory motion-compensated prediction extends the spatial displacement utilized in block-based hybrid video coding by a frame reference parameter permitting the use of ma...
Thomas Wiegand, Bo Lincoln, Bernd Girod
ICC
2007
IEEE
138views Communications» more  ICC 2007»
14 years 3 months ago
Scalable Router Memory Architecture Based on Inter-leaved DRAM: Analysis and Numerical Studies
1  Routers need buffers to store and forward packets, especially when there is network congestion. With current memory technology, neither the SRAM nor the DRAM alone is suitabl...
Feng Wang, Mounir Hamdi