2766 search results - page 486 / 554 » Hybridizing a Logical Framework |
FCCM
2011
IEEE
13 years 1 months ago
2011
IEEE
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
CVPR
2004
IEEE
15 years 6 hour ago
2004
IEEE
We present Propagation Networks (P-Nets), a novel approach for representing and recognizing sequential activities that include parallel streams of action. We represent each activi...
DAC
2007
ACM
14 years 11 months ago
2007
ACM
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
DAC
2003
ACM
14 years 11 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Partitioned BDD-based algorithms have been proposed in the literature to solve the memory explosion problem in BDD-based verification. Such algorithms can be at times ineffective ...