4 search results - page 1 / 1 » I O Overhead and Parallel VLSI Architectures for Lattice Com... |
ICPP
1987
IEEE
14 years 6 days ago
1987
IEEE
Abstract. We address the problem of designing and building efficient custom Vl.Sl-besed processors to do computations on large multi-dimensional lattices. The design tradeoffs for ...
ICCI
1990
14 years 23 days ago
1990
VLSID
1997
IEEE
14 years 28 days ago
1997
IEEE
I n this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power archite...
VLSID
2001
IEEE
14 years 9 months ago
2001
IEEE
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...