59 search results - page 4 / 12 » ILP Models for the Synthesis of Asynchronous Control Circuit... |
ITC
1999
IEEE
14 years 2 months ago
1999
IEEE
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
ACSD
2006
IEEE
14 years 1 months ago
2006
IEEE
Asynchronous circuits have received much attention recently due to their potential for energy savings. Process algebras have been extensively used in the modelling, analysis and sy...
ASYNC
2003
IEEE
14 years 3 months ago
2003
IEEE
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
ICCAD
2006
IEEE
14 years 6 months ago
2006
IEEE
Abstract— Chip-package thermal analysis is necessary for the design and synthesis of reliable, high-performance, low-power, compact integrated circuits (ICs). Many methods of IC ...
EURODAC
1994
IEEE
14 years 1 months ago
1994
IEEE
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...