128 search results - page 25 / 26 » ILP-based optimization of sequential circuits for low power |
ISCAS
2008
IEEE
14 years 1 months ago
2008
IEEE
— Long distance, low data-rate UWB communication for sensor network applications requires a highly energy efficient transceiver combined with circuit and system-level optimizati...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
GLVLSI
2003
IEEE
14 years 22 days ago
2003
IEEE
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
HPCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Flash memory based solid state drives (SSDs) have shown a great potential to change storage infrastructure fundamentally through their high performance and low power. Most recent ...