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STACS
2009
Springer
14 years 2 months ago
Error-Correcting Data Structures
We study data structures in the presence of adversarial noise. We want to encode a given object in a succinct data structure that enables us to efficiently answer specific queries...
Ronald de Wolf
VTS
2007
IEEE
203views Hardware» more  VTS 2007»
14 years 2 months ago
Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code
Conventional error correcting code (ECC) schemes used in memories and caches cannot correct double bit errors caused by a single event upset (SEU). As memory density increases, mu...
Avijit Dutta, Nur A. Touba
DATE
2006
IEEE
151views Hardware» more  DATE 2006»
14 years 1 months ago
Designing MRF based error correcting circuits for memory elements
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
EMSOFT
2009
Springer
14 years 2 months ago
Adding aggressive error correction to a high-performance compressing flash file system
While NAND flash memories have rapidly increased in both capacity and performance and are increasingly used as a storage device in many embedded systems, their reliability has de...
Yangwook Kang, Ethan L. Miller
ICMCS
2009
IEEE
152views Multimedia» more  ICMCS 2009»
13 years 5 months ago
Error correction scheme for uncompressed HD video over wireless
Digital transmission of uncompressed high-definition video is challenging because of its high data rate and its extreme sensitivity to bit errors. In this paper we propose a simpl...
Megha Manohara, Raghuraman Mudumbai, Jerry Gibson,...