305 search results - page 23 / 61 » Impact of Parallel Workloads on NoC Architecture Design |
APPT
2007
Springer
13 years 9 months ago
2007
Springer
Dynamic programming is a widely applied algorithm design technique in many areas such as computational biology and scientific computing. Typical applications using this technique a...
EUROSYS
2011
ACM
12 years 11 months ago
2011
ACM
Multicore computers pose a substantial challenge to infrastructure software such as operating systems or databases. Such software typically evolves slower than the underlying hard...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
Exploitation of silicon capacity will require improvements in design productivity and more scalable system paradigms. Asynchronous message passing networks on chip (NOC) have been...
PPOPP
2010
ACM
14 years 2 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
ISPA
2007
Springer
14 years 1 months ago
2007
Springer
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...