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» Impact of Parallel Workloads on NoC Architecture Design
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ICPP
2007
IEEE
14 years 1 months ago
Fault-Driven Re-Scheduling For Improving System-level Fault Resilience
The productivity of HPC system is determined not only by their performance, but also by their reliability. The conventional method to limit the impact of failures is checkpointing...
Yawei Li, Prashasta Gujrati, Zhiling Lan, Xian-He ...
HPCA
2006
IEEE
14 years 8 months ago
CMP design space exploration subject to physical constraints
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
Yingmin Li, Benjamin C. Lee, David Brooks, Zhigang...
HOTI
2005
IEEE
14 years 1 months ago
Design and Implementation of a Content-Aware Switch Using a Network Processor
Cluster based server architectures have been widely used as a solution to overloading in web servers because of their cost effectiveness, scalability and reliability. A content aw...
Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravishankar R. ...
ASPLOS
2012
ACM
12 years 3 months ago
Providing safe, user space access to fast, solid state disks
Emerging fast, non-volatile memories (e.g., phase change memories, spin-torque MRAMs, and the memristor) reduce storage access latencies by an order of magnitude compared to state...
Adrian M. Caulfield, Todor I. Mollov, Louis Alex E...
EUROPAR
2009
Springer
13 years 11 months ago
StarPU: A Unified Platform for Task Scheduling on Heterogeneous Multicore Architectures
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
Cédric Augonnet, Samuel Thibault, Raymond N...