Sciweavers

305 search results - page 59 / 61
» Impact of Parallel Workloads on NoC Architecture Design
Sort
View
HPCA
2008
IEEE
14 years 7 months ago
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
CIKM
2001
Springer
14 years 4 hour ago
PowerDB-IR - Information Retrieval on Top of a Database Cluster
Our current concern is a scalable infrastructure for information retrieval (IR) with up-to-date retrieval results in the presence of frequent, continuous updates. Timely processin...
Torsten Grabs, Klemens Böhm, Hans-Jörg S...
HPCA
2008
IEEE
14 years 7 months ago
Regional congestion awareness for load balance in networks-on-chip
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
Paul Gratz, Boris Grot, Stephen W. Keckler
HPCA
2008
IEEE
14 years 7 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
HPCA
2008
IEEE
14 years 7 months ago
Fundamental performance constraints in horizontal fusion of in-order cores
A conceptually appealing approach to supporting a broad range of workloads is a system comprising many small cores that can be fused, on demand, into larger cores. We demonstrate ...
Pierre Salverda, Craig B. Zilles